One widely accepted system architecture for personal computers has been the Symmetric Multi-Processing (SMP) architecture. Symmetric Multi-Processing (SMP) computer architectures are known in the art as overcoming the limitations of single or uni-processors in terms of processing speed and transaction throughput, among other things. Typically, commercially available SMP systems are generally “shared memory” systems, characterized in that multiple processing elements on a bus, or a plurality of busses, share a single global memory. In an SMP system, all memory is uniformly accessible to each processing element, which simplifies the task of dynamic load distribution. Processing of complex tasks can be distributed among various processing elements in the multiprocessor system while data used in the processing is substantially equally available to each of the processing elements undertaking any portion of the complex task. Similarly, programmers writing code for typical shared memory SMP systems do not need to be concerned with issues of data partitioning, as each of the processing elements has access to and shares the same, consistent global memory.
Each processing element in the SMP computer architecture may comprise a Direct Memory Access (DMA) controller and a processing unit, e.g., Central Processing Unit (CPU). The DMA controller may handle DMA transactions between the shared system memory and the associated processing unit in the processing element. That is, the DMA controller may allow blocks of information to be exchanged between the processing unit in the processing element and the shared system memory.
Each processing element in the SMP computer architecture may further comprise a plurality of Attached Processing Units (APU's). Each APU may be assigned to perform a particular task, e.g., image compression, image decompression, transformation, clipping, lighting, texturing, depth cueing, transparency processing, set-up, screen space rendering of graphics primitives, by the processing unit. The performance of a particular task by an APU may be accomplished in what is commonly referred to as a “remote procedure call.” That is, the processing unit requests an APU to perform a particular task instead of the processing unit performing the task itself.
Typically, a remote procedure call comprises the steps of the processing unit issuing a command to the DMA controller to copy a certain piece of code that allows a particular APU to perform a particular task, e.g., image decompression. The remote procedure call further comprises the step of the processing unit issuing a command to the DMA controller to copy data, e.g., image decompression data, to the particular APU. The particular APU then receives an indication from the processing unit to start the operation on the particular data. Upon completion of the operation, the particular APU notifies the processing unit of the completion of the task by interrupting the processing unit. The remote procedure call further comprises the step of the processing unit issuing a command to the DMA controller to copy the resulting data, i.e., operation of the APU, to the shared memory of the SMP system.
Unfortunately, remote procedure calls involve the APU interrupting the processing unit which may result in the loss of processing time. That is, an interrupt may cause the processing unit to execute an operating system call which may require thousands of processing cycles.
It would therefore be desirable to develop an SMP system where the APU(s) do not interrupt the processing unit upon completion of its task(s) in one or more remote procedure calls.